sales@hkmjd.com
Service Telephone:86-755-83294757
Trade Name:Analogue To Digital Converters - ADC
Brand:ADI
Particular Year:25+
Package:LFCSP-32
Delivery Date:New and original
Stock: 3000pcs
The AD9609BCPZ-65 device is a 10-bit, 65 MSPS, 1.8V analog-to-digital converter produced by Analog Devices (ADI), featuring an integrated high-performance sampling-hold circuit and an on-chip reference voltage source. This device has the following advantages:
The AD9609BCPZ-65 is powered by a 1.8V single analog power supply, while the digital output driver is powered by an independent power supply to adapt to the logic ranging from 1.8V to 3.3V.
2. The sampling-hold circuit maintains excellent performance at an input frequency of up to 200 MHz, and it is cost-effective, low-power-consuming and easy to use.
3. The standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-saving mode, DCO and data output (D9 to D0) timing and offset adjustment, as well as reference voltage source mode, etc.
4. The AD9609BCPZ-65 adopts a 32-pin LFCSP package, complies with the RoHS standard, and is pin compatible with the 12-bit ADC AD9629 and 14-bit ADC AD9649. Therefore, 10-bit and 14-bit converters with sampling rates ranging from 20 MSPS to 80 MSPS can be easily upgraded.
Application scenarios
The AD9609BCPZ-65 is suitable for application scenarios that require high sampling rates and low power consumption, such as communication, test and measurement, and industrial control fields. Its high performance and low power consumption characteristics make it perform well in systems with strict requirements.
Key Features
Powered by 1.8V analog power supply
Output power supply: 1.8V to 3.3V
Differential input, 700 MHz bandwidth
On-chip reference voltage source and sampling hold circuit
2 V P-P differential analog input
DNL = ±0.10 LSB
Serial port control options
Offset binary, gray code or binary complement data formats
Optional clock duty cycle stabilizer
1 to 8 integer input clock divider
Built-in optional digital test code generation function
Energy-saving shutdown mode
Data clock output with programmable clock and data alignment function
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