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The AD9767ASTZRL is a dual-port, high-speed, dual-channel, 14-bit CMOS DAC. Each device integrates two high-quality TxDAC+® cores, a reference voltage source, and digital interface circuitry, packaged in a 48-pin small LQFP package. These devices offer excellent AC and DC performance while supporting update rates up to 125 MSPS.

The AD9767ASTZRL is optimised for I-data and Q-data processing in communication applications. The digital interface includes two dual-buffered latches and control logic. Independent write inputs allow data to be written independently to each of the two DAC ports. Independent clocks control the update rates of each DAC.

Using the mode control pin, the AD9767ASTZRL can interface with two separate data ports or with a single interleaved high-speed data port. In interleaved mode, the input data stream is demultiplexed into raw I and Q data, which are then latched. The I and Q data are then converted by the two DACs and updated at half the input data rate.

The GAINCTRL pin allows the full-scale current (IOUTFS) of the two DACs to be set in two modes. The IOUTFS of each DAC can be independently set using two external resistors, or the IOUTFS of both DACs can be set using a single external resistor.

AD9767ASTZRL Features

14-bit dual-channel transmitter digital-to-analogue converter (DAC)

Update rate: 125 MSPS

Excellent SFDR (to Nyquist frequency): 75 dBc (5 MHz output)

Excellent gain and offset matching: 0.1%

Fully independent or single-resistor gain control

Dual-port or interleaved input data

1.2 V on-chip reference voltage source  

5 V or 3.3 V power supply  

Power consumption: 380 mW (5 V)  

Power-saving mode: 50 mW (5 V)  

48-pin LQFP package

AD9767ASTZRL Applications  

Communications  

Base stations  

Digital synthesis  

Quadrature modulation  

3D ultrasound

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