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The ADF4196BCPZ frequency synthesizer can be used to achieve local oscillator (LO) in the up-conversion and down-conversion portions of wireless receivers and transmitters. Its construction is specifically designed to meet the GSM/EDGE lock-in time requirements of base stations, and its fast setup capability makes the ADF4196BCPZ ideal for pulse Doppler radar applications.

The ADF4196BCPZ consists of a low-noise digital frequency phase discriminator (PFD) and a precision differential charge pump. There is also a differential amplifier to convert the differential output of the charge pump into a single terminal voltage for an external voltage controlled oscillator (VCO).

The ADF4196BCPZ has the following features:

Quickly build decimal N

Frequency division PLL structure

A single PLL can replace a ping pong frequency synthesizer

Frequency hopping over the entire GSM band is accomplished in 5 μs, and the phase establishment time is less than 20 µs

Phase error: 1 degree rms (4 GHz RF output)

Digital programmable output phase

Digital programmable output phase

RF input range up to 6 GHz

Three wire serial interface

On chip low noise differential amplifier

Phase noise quality factor: -216 dBc/Hz

Loop filter design can be realized by ADIsimPLL

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