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The AD9683BCPZ-250 is a 14-bit analog-to-digital converter (ADC) with a sampling rate of 250 MSPS, designed to provide solutions for low-cost, small-sized, wide-bandwidth, and multi-functional communication applications. The following are its core features:

JESD204B Subclass 0 or Subclass 1 encoded serial digital output

Signal-to-noise ratio (SNR) : 70.6 dBFS (185 MHz AIN, 250 MSPS)

Spurious dynamic range (SFDR) : 88 dBc (185 MHz AIN, 250 MSPS)

Total power consumption

434 mW (250 MSPS)

1.8V power supply voltage

1 to 8 integer input clock divider

The sampling rate can reach up to 250 MSPS at most

The maximum intermediate frequency sampling frequency can reach up to 400 MHz

The analog-to-digital converter (ADC) is equipped with a built-in reference voltage source

Flexible analog input range

- 1.4V p-p to 2.0V p-p

(Nominal value 1.75 V p-p -p)

ADC Clock Duty cycle Stabilizer (DCS

Serial port control

Energy-saving power-off mode

In addition, this ADC core adopts a multi-level, differential pipeline architecture and integrates output error correction logic. The ADC core features a wide bandwidth input and supports various input ranges selectable by users. Integrated reference voltage sources can simplify the design. Duty cycle stabilizers can be used to compensate for the fluctuations in the duty cycle of the ADC clock, enabling the converter to maintain excellent performance. The JESD204B high-speed serial interface can reduce the wiring requirements of circuit boards and decrease the number of pins needed for receiving devices.

Application scenarios

The AD9683BCPZ-250 is applicable to communication systems (such as 3G/4G/5G base stations, WiMAX, TD-SCDMA, etc.), radar receivers, electronic test equipment and ultrasonic instruments, etc. ‌

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