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The CDCE6214LTWRGETQ1 is a 4-channel, ultra-low-power, mid-level jitter clock generator for automotive applications that generates five independent clock outputs selectable between various driver modes. The input source can be a single-ended or differential input clock source, or a crystal.The CDCE6214LTWRGETQ1 features a fractional N PLL that synthesises an uncorrelated base frequency at any input frequency. 

Features

- Meets AEC-Q100 for automotive applications

- Temperature class 2: -40°C to +105°C

- Functional Safety

- Documentation available for functional safety system designs

- High-performance, low-power fractional N PLLs can be integrated with high performance, low-power fractional N PLLs through RMS jitter and spurious (12kHz - 20MHz, Fout > 100MHz). RMS jitter and spurious (12kHz - 20MHz, Fout > 100MHz) can be used to configure a high-performance, low-power fractional N PLL as follows. follows:

- Integer mode:

- Differential outputs: 350fs typical, 600fs max.

- LVCMOS output: 1.05ps typical, 1.5ps max. 1.05ps typical, 1.5ps maximum

- Fractional Mode:

- Fractional Mode: Differential Output: 1.7ps typical, 2.1ps max.

- LVCMOS Output: 2.0ps typical, 4.0ps max. 4.0ps

- Supports PCIe Gen1/2/3/4 with SSC and Gen1/2/3/4 without SSC. Internal VCO: 2.3355

- Internal VCO: 2.335 GHz to 2.625 GHz

- Typical power consumption: 65mA for 4 output channels, 23mA for single output channel. 23mA for a single output channel.

- Universal clock input, two reference inputs for redundant support

- Differential AC coupling or LVCMOS: 10MHz to 200MHz

- Crystals: 10MHz to 50MHz

- Flexible output clock distribution

- 4-channel frequency divider: up to five unique output frequencies ranging from 24kHz to 328.125MHz

- OUT0 - OUT4 pins have LVDS, LPHCSL or LVCMOS-like outputs

- Burr-free output divider switching and output channel synchronisation

- Independent output enable via active-low GPIOs and registers Enables independent output enables via low-level active GPIOs and registers

- Frequency margin options

- DCO mode: Frequency increment/decrement in steps of 10ppb or less. DCO mode: frequency is increased/decreased in steps of 10ppb or less

- Fully integrated and configurable loop bandwidth: 100kHz to 1.6MHz

- Level switchable from a single or hybrid supply: 1.8V, 2.5V, 3.3V, 3.3V

- Configurable GPIOs and flexible configuration options

- I2C-compatible interface: up to 400kHz

- Integrated EEPROM with two page and external select pins. Field programmable.

- Supports 100Ω systems

- Support for 100Ω systems

- Small size: 24-pin VQFN (4mm × 4mm)

Applications

- PCIe Generation 1 to 5 Clocking

- Advanced Driver Assistance Systems (ADAS) - Sensor Fusion

- Infotainment systems and instrument clusters - Car audio mainframes - eAVBs

- Data Centre and Enterprise Computing

- PCs and laptops

- Enterprise Machines - Multifunction Printers

- Test and Measurement - Handheld Devices

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