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The ADC12DJ5200ALREP device is a 10.4GSPS single-channel or 5.2GSPS dual-channel 12-bit RF sampling analog-to-digital converter (ADC) from TI.

Applications:

• Broadband digital converter

• Electronic warfare (signals intelligence, electronic intelligence)

• Satellite Communications (SATCOM)

• RF Sampling Software Defined Radio (SDR)

Product Introduction:

The ADC12DJ5200ALREP device is an RF sampling Gigabit sampling analog-to-digital converter (ADC) that directly samples input frequencies from DC to more than 10GHz. The ADC12DJ5200-EP can be configured as a dual-channel 5.2GSPS ADC or a single-channel 10.4GSPS ADC. Supports a range of available input frequencies up to 10GHz for direct RF sampling of the L, S, C, and X bands of frequency-agile systems.

The ADC12DJ5200-EP uses a high-speed JESD204C output interface with up to 16 serial channels, supporting line rates of up to 17.16Gbps. Deterministic delay and multi-device synchronization are supported by JESD204C subclass 1. The JESD204C interface can be configured to trade off line rates and channel counts. Support 8b/10b and 64b/66b data encoding schemes. 64b/66b encoding supports forward error correction (FEC) to improve the bit error rate. This interface is backward compatible with the JESD204B receiver.

Innovative synchronization features such as noise-free aperture delay adjustment and SYSREF Windows simplify system design for multichannel applications. An optional digital downconverter (DDC) is provided to downconvert the digital signal spectrum to the baseband signal and reduce the interface rate. Programmable FIR filter can achieve on-chip equalization.

Features:

• High reliability enhanced products:

Controlled baseline: one package test plant, one manufacturing site, longer product life cycles, longer product change notification cycles, and product traceability

• ADC core:

- 12-bit resolution

- Sampling rate up to 10.4GSPS in single-channel mode

- Sampling rate up to 5.2GSPS in dual-channel mode

• Performance specifications:

- Background noise (-20dbfs, VFS = 1VPP-DIFF) :

• Dual-channel mode: - 151.8dBFS/Hz

• Single-channel mode: - 154.4dBFS/Hz

- ENOB (dual-channel, FIN = 2.4GHz) : indicates 8.6 bits

• Buffer analog input when VCMI is 0V:

- Analog input bandwidth (-3dB) : 8GHz

- Available input frequency range: > 10GHz

- Full scale input voltage (VFS, default) : 0.8VPP

• Noiseless Aperture delay (tAD) adjustment:

- Precise sampling control: 19fs steps

- Simplifies synchronization and interleaving

- Constant temperature and voltage delay

• Easy to use synchronization features:

- Automatic SYSREF timing calibration

- Time stamp of sample marking

• JESD204C Serial data interface:

- Maximum channel rate: 17.16Gbps

- Supports 64b/66b and 8b/10b encoding

- The 8b/10b mode is compatible with JESD204B

• Optional Digital Downconverter (DDC) :

- 4x, 8x, 16x and 32x complex extraction

- Each DDC has four independent 32-bit Ncos

Peak RF input power (Diff) : +26.5dBm (+27.5dBFS, 560x full scale power)

• Programmable FIR filters for equalization

• Power consumption: 4W

• Power supply: 1.1V, 1.9V