sales@hkmjd.com
Service Telephone:86-755-83294757
Broadcom BCM87416:400G PAM-4 Transceiver PHY with Integrated TIA and Laser Driver
Broadcom BCM87416:400G PAM-4 Transceiver PHY with Integrated TIA and Laser DriverProduct Description of BCM87416BCM87416 is a high-performance, low-power 400GbE PAM-4 transceiver PHY capable of directly driving four lanes of 106-Gb/s PAM-4 at 53 Gbaud…
Broadcom BCM87416:400G PAM-4 Transceiver PHY with Integrated TIA and Laser Driver
Product Description of BCM87416
BCM87416 is a high-performance, low-power 400GbE PAM-4 transceiver PHY capable of directly driving four lanes of 106-Gb/s PAM-4 at 53 Gbaud, while supporting DR4/FR4/LR4 optical links.
BCM87416 leverages a market-leading PAM-4 transceiver PHY technology platform and represents the industry’s first monolithic 400G PAM-4 PHY with integrated transimpedance amplifier (TIA) and laser driver, developed in 7-nm CMOS. The Broadcom advanced DSP technology and equalization techniques compensate for optical impairments inside pluggable optical modules while maintaining the world’s lowest power to enable the deployment of 12.8 Tb/s and higher-density switch ASICs.
BCM87416 incorporates a highly differentiated feature set, including integrated TIA, laser drivers, market-leading FEC capability options, and system-side switch ASIC SerDes interoperability to provide an unmatched competitive advantage in the market.
In 400GbE mode, the BCM87416 converts eight lanes of 53 Gb/s (at 26-Gbaud PAM-4) from the system side into four lanes of 106 Gb/s (at 53-Gbaud PAM-4) to directly drive next-generation high-density optical PAM-4 links inside QSFP-DD and OSFP form-factor modules. The BCM87416 is compliant with industry standards, including 400GBASE-DR4 and 100G-MSA draft 1.0 with KP4 FEC and FEC bypass capability.
The on-chip clock synthesis is performed by a low-cost 156.25-MHz reference clock through high-frequency, low-jitter phase-locked loops (PLLs).
Features of BCM87416
4 × 100G PAM-4 PHY drives 400GbE over optics – System side: 8 × 53G PAM-4 – Line side: 4 × 106G PAM-4
Supports DR4 to DR1 break-out mode with independent lane operation capability
Supports integrated laser driver and integrated TIA
Client-side interface compliance: IEEE C2C and C2Mannels
IEEE 802.3bs standard-compliant KP4 and end-to-end FEC bypass operation
Line-side and system-side loopbacks
Low-power 7-nm CMOS design
Applications of BCM87416
Wired network infrastructure
400G QSFP-DD/OSFP optical modules
400G DR4/FR4/LR4
Time:2024-11-20
Time:2024-11-20
Time:2024-11-20
Time:2024-11-20
Contact Number:86-755-83294757
Enterprise QQ:1668527835/ 2850151598/ 2850151584/ 2850151585
Business Hours:9:00-18:00
E-mail:sales@hkmjd.com
Company Address:Room1239, Guoli building, Zhenzhong Road, Futian District, Shenzhen, Guangdong
CopyRight ©2022 Copyright belongs to Mingjiada Yue ICP Bei No. 05062024-12
Official QR Code
Links: