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The ADSP-SC572CBCZ-4 processor belongs to the SHARC® family. The ADSP-SC572 SHARC processor belongs to the Single Instruction Multiple Data (SIMD) SHARC family of digital signal processors (DSPS) and uses ADI's Super Harvard architecture.

The ADSP-SC572CBZN-4 processor is optimized for high-performance audio/floating-point applications, features large-capacity on-chip static random access memory (SRAM), multiple internal buses that eliminate input/output (I/O) bottlenecks, and offers an innovative digital audio interface (DAI). Recent additions to the SHARC+ kernel include cache enhancement and branch prediction, while keeping the instruction set compatible with previous SHARC products.

ADSP-SC572CBCZ-4 -- Technical specification

Product: DSPs

Core: ARM Cortex A5, SHARC+

Number of cores: 2 cores

Max clock frequency: 450 MHz, 450 MHz

Package/box: BGA-400

Program memory size: -

Data RAM size: -

L1 Cache instruction memory: 32 kB, 384 kB

L1 Cache data storage: 32 kB

Working power supply voltage: 1.1V

Series: ADSP-SC572

Brand name: SHARC+

Installation style: SMD/SMT

Operating temperature: -40 °C to + 105°C

Data bus width: 16 bit

Description type: Floating Point

Interface type: SDIO, USB

Humidity sensitivity: Yes

Number of input/output terminals: 92 I/O

Program memory type: DDR2/DDR3/LPDDR1

Power supply voltage - Max: 1.15V

Supply voltage - Minimum: 1.05V

Unit weight: 816 mg

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