sales@hkmjd.com
Service Telephone:86-755-83294757
Trade Name:Ethernet Transceiver
Brand:Marvell
Particular Year:24+
Package:FCBGA-256
Delivery Date:New and Original
Stock: 2400pcs
The Marvell® Alaska® C 88X5121-A1-BVV4C000 is a fully integrated dual port 100 Gbps device that performs all physical layer functions required to drive 100 Gbps Ethernet over a variety of media including optics, backplanes and passive copper cables. Manufactured with 28 nanometer lithography, in a 17mmx17mm package footprint, the Marvell 88X5121-A1-BVV4C000 enables low-power dissipation, high density 100GbE and 25GbE line card designs. The line interface of the 88X5121-A1-BVV4C000 is fully compliant to the IEEE 802.3BJ standard that defnes the physical layer specifcations for 100 Gbps Ethernet transmission over backplanes and copper cables. The device supports Reed-Solomon Forward Error Correction function required for 100G-CR4 and 100G-SR4 operation, as well as auto-negotiation and coefficient training protocol required by the IEEE 802.3 standards.
Key Benefits
• Fully compliant to IEEE 802.3BJ and 803.3BM standards for 100GbE transmission over optical media, passive copper cables and backplanes
• Octal 25G mode for 25GbE and other low latency applications
• Support for speed negotiation and coe°cient training
Features
• Dual Port 100GbE PHY
• Octal 25G repeater
• Dual 40GbE aggregator that enables aggregation of 40GbE from 4x10G lanes to 2x20G lanes
• Ability to handle Insertion Loss of greater than 30dB at Nyquist without Forward Error Correction (FEC)
• Line interface SERDES that exceeds the equalization requirements for 100G-CR4 passive copper cables and 100G-KR4 backplanes
• OIF25G-LR compliant long reach host interface SERDES that exceeds IEEE CAUI-4 requirements
• Fully autonomous adaptive equalization on line and host receiver
• Support for 100GbE/40GbE autonegotiation and coe˜cient training protocol
• Support for IEEE 802.3BJ Reed-Solomon Forward Error Correction (R-S FEC) functionality
• Low latency repeater mode for applications not requiring FEC capability with fully independent operation on each lane
• Hole-free operation from 1.25Gps to 28Gbps
• Programmable clock divide ratios
• Recovered clock outputs for SyncE applications
• Ethernet packet and programmable packet generation and checking
• Non-destructive Eye monitoring capability on all high speed lanes
• Clause 45 MDC/MDIO management interface
• Junction temperature range of 0 to 105°
• Small 17mm x 17mm FCBGA package
Model
Brand
Package
Quantity
Describe
Marvell
BGA
3000
Single Chip Ethernet Transceiver with 256-bit MACsec Encryption
Marvell
BGA
3000
Single Chip Ethernet Transceiver with 256-bit MACsec Encryption
Marvell
BGA
3000
Ethernet transceiver with integrated long-range dual-mode (PAM4 and NRZ) SerDes
Marvell
BGA
3000
Single Chip Ethernet Transceiver with 256-bit MACsec Encryption
Marvell
FCBGA
3000
Single-chip Ethernet transceiver with long-reach 100G PAM4 I/O
Marvell
FCBGA-841
3000
Single-chip 800 GbE PAM4 PHY transceiver - 16-port Ethernet transceiver
Marvell
FCBGA-256
2400
Integrated 100 Gbps Ethernet Gearbox with Copper Cable and Backplane Drive Capability
Marvell
FCBGA-256
2400
Dual 100G/40G, Quad 50G, Octal 25G/10G Ethernet Transceiver
Marvell
FCBGA-256
2400
Dual 100G/40G, Quad 50G, Octal 25G/10G Ethernet Transceiver
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