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Analog Devices Analog-to-Digital Converter: AD9650 BCPZ-105 a 16-bit, 105 MSPS, 1.8 V Dual ADC

Analog Devices Analog-to-Digital Converter: AD9650 BCPZ-105 a 16-bit, 105 MSPS, 1.8 V Dual ADC

Source:our siteTime:2025-06-12Views:

The AD9650BCPZ-105 device is a dual-channel, 16-bit, 105 MSPS analog-to-digital converter (ADC), specifically designed for digitizing high-frequency and wide dynamic range signals, supporting input frequencies up to 300 MHz.Product advantagesThe on-ch…

The AD9650BCPZ-105 device is a dual-channel, 16-bit, 105 MSPS analog-to-digital converter (ADC), specifically designed for digitizing high-frequency and wide dynamic range signals, supporting input frequencies up to 300 MHz.

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Product advantages

The on-chip perturbation option can improve the spurious dynamic range (SFDR) performance of low-power analog input signals.

The proprietary differential input still maintains excellent signal-to-noise ratio (SNR) performance at an input frequency of up to 300 MHz.

It is powered by a single 1.8V power supply, while the digital output driver is powered by an independent power supply to support 1.8V CMOS or LVDS output.

The standard Serial Port Interface (SPI) supports various product features and functions, such as: data formatting (offset binary, binary complement or gray code), clock DCS enabling, power-saving mode and test mode.

Pin-compatible with AD9268 and other dual-channel series such as AD9269, AD9251, AD9231 and AD9204. In this way, upgrades can be easily achieved among different resolutions and bandwidths.


The main features of AD9650BCPZ-105

Powered by 1.8V analog power supply

Powered by 1.8V CMOS or LVDS output

Signal-to-noise ratio (SNR) : 82 dBFS (30 MHz input, 105 MSPS data rate)

SFDR: 90 dBc (30 MHz input, 105 MSPS data rate)

Low power consumption: 328 mW (105 MSPS) per channel

1 to 8 integer input clock divider


Description

The AD9650BCPZ-105 is a dual-channel, 16-bit, 105 MSPS analog-to-digital converter (ADC), specifically designed for digitizing high-frequency and wide dynamic range signals, supporting input frequencies up to 300 MHz.


This dual-channel ADC core adopts a multi-level, differential pipeline architecture and integrates output error correction logic. Each ADC features a wide bandwidth, differential sampling-hold analog input amplifier, and a shared integrated reference voltage source, which simplifies design considerations. The duty cycle stabilizer can be used to compensate for the fluctuations in the duty cycle of the ADC clock, enabling the converter to maintain excellent performance.


The ADC output data can be directly sent to two external 16-bit output ports or multiplexed on a single 16-bit bus. These outputs can be set to 1.8V CMOS or LVDS.


When necessary, flexible power-off options can significantly reduce power consumption.


The programming of Settings and controls is accomplished using a three-wire SPI-compatible serial interface.


The AD9650BCPZ-105 is available in a 64-pin LFCSP package and has a rated temperature range of -40 °C to +85°C for industrial use.


Application field

The AD9650BCPZ-105 is widely used in the following fields:

Industrial instruments and meters

X-ray, MRI and ultrasound equipment

High-speed pulse acquisition

Chemical and spectral analysis

Direct frequency conversion receiver

Multimode digital receiver

Intelligent antenna system

General-purpose software radio


Furthermore, the AD9650BCPZ-105 has the following key parameters:

Resolution: 16 bits

Number of channels: 2 channels

Interface type: Parallel, SPI

Sampling ratio: 105 MS/s

Input type: Differential

Structure: Pipeline

Analog power supply voltage: 1.8V

Digital power supply voltage: 1.8V

SNR - Signal-to-Noise Ratio: 82.5 dB

Minimum operating temperature: -40 ° C

Maximum operating temperature: + 85 ° C

Package/Box: LFCSP-64


Contact Mingjiada (www.hkmjd.com) for supply of AD9650BCPZ-105 product.


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