sales@hkmjd.com
Service Telephone:86-755-83294757
Trade Name:Clock jitter eliminator
Brand:ADI
Particular Year:25+
Package:LFCSP-48
Delivery Date:New and original
Stock: 3000pcs
The AD9542BCPZ is a high-performance jitter eliminator with Dual DPLL design with four inputs and ten outputs for multi-service line card clock converters and jitter eliminators .
The AD9542BCPZ has the following features:
Dual-channel DPLL synchronizes the physical layer clock from 2 kHz to 750 MHz, providing frequency conversion for a high-noise reference source and jitter purification
Complies with ITU-T G.8262 and Telcordia GR-253 standards
Telcordia GR-1244, ITU-T G.812, G.813, G.823, G.824, and G.825 are supported
Continuous frequency monitoring and reference validation with frequency deviations as low as 50 ppb
The two DPLLS have 24-bit decimal dividers and 24-bit programmable modules
Programmable digital loop filter bandwidth: 10−4 Hz to 1850 Hz
Automatic and manual hold and reference switching provides zero latency, no interruptions or phase additions
Priority based programmable reference switching with manual, automatic recovery and automatic non-recovery modes
5 pairs of clock output pins, each available as differential LVDS/HCSL/CML or 2 single-ended outputs (1 Hz to 500 MHz)
2 differential or 4 single-ended input reference voltage sources
The cross-point multiplexer interconnects the reference input with the PLL
Support for embedded (modulated) input/output clock signals
Fast DPLL lock mode
Provides internal functionality that combines the low phase noise of a crystal oscillator or crystal oscillator with the frequency stability and accuracy of a TCXO or OCXO
External EEPROM support for autonomous initialization
1.8V single power supply with internal regulation
Built-in temperature monitoring/alarm and temperature compensation for enhanced zero delay performance
Model
Brand
Package
Quantity
Describe
TI
HTQFP-64
2000
Automotive Grade Ultra-Low-Noise JESD204B/C Dual-Loop Clock Jitter Cleaner
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