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The TMS320C5502ZAVR300 is a fixed-point digital signal processor (DSP) based on the TMS320C55x DSP CPU processor core. The TMS320C55x CPU offers two multiplication accumulation (MAC) units, each capable of 17-bit by 17-bit multiplication in a single cycle. A central 40-bit algorithm and logical unit (ALU) is supported by an additional 16-bit ALU.

Product: TMS320C5502ZAVR300

Type: DSP

Package: NFBGA-201

Features:

High Performance, low power, fixed-point TMS320C55x™ Digital Signal Processor (DSP)

Instruction cycle time: 3.33/5ns

Clock rate: 300/200MHz

16Kb Instruction Cache (I-Cache)

Execute one or two instructions per cycle

Double multiplier [up to 600 million multiplication-per-second (MMACS)]

Two arithmetic/Logic units (ALU)

One program bus, three internal data/operand read buses, and two internal data/operand write buses

Instruction cache (16KB)

32K x 16-bit on-chip RAM, consisting of eight 4K x 16-bit dual-access RAM (DARAM) blocks (64KB)

16K x 16-bit single-wait state on-chip ROM (32KB)

8M x 16 bits maximum addressable external memory space

32-bit external parallel bus memory with support for External Memory Interface (EMIF), universal input/output (GPIO) functionality and seamless interface

Asynchronous Static RAM (SRAM)

Asynchronous EPROM

Synchronous DRAM (SDRAM)

Synchronous Burst RAM (SBRAM)

The emulation/debug trace saves the last 16 program counter (PC) discontinuous values and the previous 32 PC values

Programmable low power control of six device function areas

On-chip peripherals

6-channel Direct Memory access (DMA) controller

Three multi-channel buffered serial Ports (McBSP)

Programmable analog phase-locked loop (APLL) clock generator

Universal I/O (GPIO) Pins and Dedicated Output Pins (XF)

8-bit / 16-bit Parallel Host Port Interface (HPI)

4 timers

Two 64-bit universal timers

64-bit programmable watchdog timer

64-bit DSP/BIOS™ counter

Internal integrated circuit (I2C) interface

Universal Asynchronous Receiver/Transmitter (UART)

Simulation logic based on scan on chip

IEEE Std 1149.1 (JTAG) boundary scan logic

encapsulation

176 Pin LQFP (Thin Square flat) (PGF suffix)

201 Pin MicroStar BGA™ (Ball Grid Array) (GZZ and ZH suffixes)

3.3V I/O supply voltage

Core power supply voltage: 1.26V

• 1.Is the inventory and price seen on the platform accurate?

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• 6.Can the company issue an invoice?

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