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Overview:

The 8T73S208 is a high-performance differential LVPECL clock divider and fan-out buffer. The device is designed for frequency division and signal fan-out of high frequency and low phase noise clocks. The 8T73S208 is powered by 2.5V and 3.3V power supplies. The guaranteed output-to-output and device-to-device skew characteristics make the 8T73S208 ideal for clock distribution applications that require well-defined performance and repeatability. Integrated input termination resistors simplify the interface to the reference source and reduce the number of passive components. In the high impedance state, each output can be individually enabled or disabled by the I2C register. During power-on, all outputs are enabled.

Features

• A differential input reference clock

Differential pairs can accept the following differential input levels :LVDS, LVPECL, CML

• Integrated input terminal resistor

• Eight LVPECL outputs

• Optional clock frequencies are 1, 2, 4 and 8

• Maximum input clock frequency :1000MHz

• Control input LVCMOS interface level

• Enable/disable independent output through the I2C interface

• Output skew :15ps(typical)

• Output rise/fall time :350ps(Max)

Low additive phase jitter, root mean square value :0.182 picoseconds (typical)

• Full 2.5V and 3.3V supply voltages

Lead-free (RoHS 6) 32-pin VFQFN package

• Ambient operating temperature -40°C to 85°C

Specifications of 8T73S208BNLGI:

Number of outputs: 8 Output

Propagation delay - Maximum: 1230 ps

Maximum input frequency: 1 GHz

Supply voltage - Minimum: 2.375V

Supply voltage - Max. : 3.465V

Series: 8T73S208

Minimum operating temperature: -40 °C

Maximum operating temperature: + 85°C

Trademark: Renesas Electronics

Humidity sensitivity: Yes

Installation style: SMD/SMT

Package: Tray

Product type: Clock Buffers