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Shenzhen Mingjiada Electronics Sells New Broadcom Automotive Ethernet PHY BCM89083A0BFBG Automotive Camera MCU with Integrated Image Processing and Ethernet Streaming Pipeline

Overview

The BCM89083A0BFBG is a fully integrated BroadR-Reach® camera endpoint microcontroller for automotive rear-view camera and side-view camera applications.The Arm Cortex-M7 supports low-latency interrupt processing through the use of a Real-Time Operating System (RTOS), runs the Ethernet Audio/Video Broadcasting (AVB) stack, and handles a variety of peripherals’ housekeeping tasks. An enhanced cache architecture improves system performance.

The CMOS image sensor interface supports a dual-channel MIPI CSI-2 interface. the ISP supports black level adjustment, lens shading correction, 2D adaptive noise filtering, defective pixel compensation, white balance adjustment, colour crosstalk compensation, edge sharpening, demosaicing, colour correction and gamma correction, pseudo-colour suppression, hue and saturation control, and adaptive local tone mapping in hardware pipeline.

The display controllers can directly drive dual- or quad-channel OpenLDI and MIPI DSI displays and can connect to external LVDS serialisers. A graphics plane overlay with alpha blending can overlay driving tracks, gauges, or other visual elements before the video is encoded and streamed over BroadR-Reach Ethernet.

The device also supports the IEEE 802.1as and IEEE 802.1Q AVB bridge standards for clock synchronisation and video streaming. the BCM89083 integrates multiple I/O controllers including SPI, QSPI, I2S/TDM, I2C, UART/LIN, PDM, and GPIOs. the BCM89083 also includes on-chip switching regulators and FETs to simplify power design. The BCM89083 also includes on-chip switching regulators and FETs to simplify power supply design.

Camera Platform Solution Functional Block Diagram

Key Features

- Integrated BroadR-Reach 100BASE-T1 physical layer 

- AECQ-100 certified 

- Flexible camera interface (MIPI CSI-2) to connect to a variety of camera sensors 

- Flexible display interfaces (OpenLDI and MIPI DSI) to a variety of monitors and LVDS serialisers 

- High-performance, programmable SIMD pixel processor/DSP core for H264 video encoding and implementation of video algorithms 

- Low latency encoder for encoding and transmitting 1.3MP resolution video at 30 fps 

- Integrated HDR-enabled line-based ISP further reduces BOM cost 

- Arm Cortex-M7 core running at 400 MHz 

- Integrated 1.0V regulator reduces the need for expensive external power management circuitry 

- Supports gPTP time synchronisation according to IEEE 1588 and IEEE 1722a. 

- Low-power and space-optimised solution for rear-view and surround-view camera applications 

- 7 mm x 7 mm, 81-pin FBGA package

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