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The ADC12DJ1600AAVTQ1 device is an automotive dual-channel, 1.6GSPS, 12-bit analog-to-digital converter (ADC) with a JESD204C interface, featuring the following main characteristics:

• Comply with the EC-Q100 standard for automotive applications:

-Temperature grade 1: -40 °C to +125°C, TA

• ADC kernel:

-Resolution: 12 bits

- Maximum sampling rate: 1.6GSPS

-Non-interlaced architecture

Internal jitter can reduce high-order harmonics

• Performance specification (-1 DBFS) :

-SNR (100MHz) : 57.4dBFS

-ENOB (100MHz) : 9.1 bits

-SFDR (100MHz) : 64dBc

- Background noise (-20 DBFS) : -147 DBFS

• Full-scale input voltage: 800 MVPP-DIFF

• Full power input bandwidth: 6GHz

• JESD204C Serial data interface:

It supports a total of 2 to 8 (four-channel/dual-channel) or 1 to 4 (single-channel) serializer/deserializer channels

- Maximum baud rate: 17.16Gbps

-64B /66B and 8B/10B encoding modes

-Subclass 1 supports deterministic latency

- Compatible with the JESD204B receiver

Optional internal sampling clock generation

- Internal PLL and VCO (7.2-8.2GHz)

The SYSREF window simplifies synchronization

Four clock outputs can simplify the system clock

-Reference clock of the FPGA or adjacent ADC

- Reference clock of the serializer/deserializer transceiver

Timestamp input and output of the pulse system

• Power consumption (1GSPS) : 700mW/ channel

• Power supply: 1.1V, 1.9V

Introduction

The ADC12DJ1600AAVTQ1 is a series of 12-bit, 1.6GSPS four-channel/dual-channel/single-channel analog-to-digital converters (ADCs). Due to its features such as low power consumption, high sampling rate and 12-bit resolution, Therefore, the ADC12DJ1600AAVTQ1 is highly suitable for optical detection and ranging (liDAR) systems. The ADC12DJ1600AAVTQ1 complies with automotive application standards.

The full power input bandwidth of 6GHz (-3dB) provides a flat frequency response for frequency modulated continuous wave (FMCW) lidar systems and a narrow impulse response for pulse-based systems. The full power input bandwidth also supports direct RF sampling in the L band and S band.

The ADC12DJ1600AAVTQ1 incorporates numerous clock functions to relax system hardware requirements, such as an internal phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO) for generating sampling clocks. Four clock outputs are provided to time the logic and serializer/deserializer of the FPGA or ASIC. Timestamp input and output are provided for the pulse system.

The JESD204C serial interface of ADC12DJ1600AAVTQ1 reduces the system size by reducing the amount of printed circuit board (PCB) wiring. The interface mode supports 2 to 8 channels (dual-channel and quad-channel devices) and a serializer/deserializer baud rate of up to 17.16Gbps, enabling optimal configuration for each application.

Basic information

Model: ADC12DJ1600AAVTQ1

Resolution: 12 bits

Number of channels: 2 channels

Interface type: Serial

Sampling ratio: 1.6 GS/s

Input type: Differential

Structure: Folding Interpolating

Analog power supply voltage: 1.1V, 1.9V

Digital power supply voltage: 1.1V, 1.9V

SNR - Signal-to-Noise Ratio: 57.4 dB

Minimum operating temperature: -40 ° C

Maximum operating temperature: + 125 ° C

Package/Box: FCBGA-144

Due to the high performance and reliability of the ADC12DJ1600AAVTQ1, it is mainly targeted at application scenarios that require high-speed and high-precision data acquisition, especially in the automotive electronics field. It complies with the EC-Q100 standard, ensuring stability and reliability in harsh environments.

Contact Mingjiada immediately (www.hkmjd.com) for availability of the ADC12DJ1600AAVTQ1 product.