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Single-Port, Quad-Rate QCA-8081-1-56MQFN-MT-02-0 (10 M/100 M/1 G/2.5 G) Ethernet PHY Transceiver

Single-Port, Quad-Rate QCA-8081-1-56MQFN-MT-02-0 (10 M/100 M/1 G/2.5 G) Ethernet PHY Transceiver

Source:our siteTime:2024-03-25Views:

Shenzhen Mingjiada Electronics Co., Ltd. supplies Qualcomm chipset QCA-8081-1-56MQFN-MT-02-0 Single-port, Quad-rate (10 M/100 M/1 G/2.5 G) Ethernet PHY TransceiverOverviewThe QCA8081 supports six different Ethernet protocols: 10BASE-Te half-duplex, 10…

Shenzhen Mingjiada Electronics Co., Ltd. supplies Qualcomm chipset QCA-8081-1-56MQFN-MT-02-0 Single-port, Quad-rate (10 M/100 M/1 G/2.5 G) Ethernet PHY Transceiver


Overview

The QCA8081 supports six different Ethernet protocols: 10BASE-Te half-duplex, 10BASE-Te full-duplex, 100BASE-TX half-duplex, 100BASE-TX full-duplex, 1000BASE-T full-duplex, and 2500BASE-T full-duplex. The QCA8081 provides physical layer functionality for transmitting and receiving data over standard Category 5 (Cat5) or Category 6 (Cat6) unshielded twisted pair cable.The QCA8081 includes a SerDes that can be used to interface with the MAC as either a 1.25 G SGMII or 3.125 G SGMII+.


The QCA8081 integrates Green ETHOS® power-saving technology, which provides significant power savings in both active and idle states. The Green ETHOS power-saving scheme includes ultra-low power consumption in cable unplugged mode or port power-down mode.The QCA8081 supports standard IEEE 802.3az Energy Efficient Ethernet (EEE) for 10BASE-Te, 100BASE-TX and 1000BASE-T.


Specification

Ethernet

Standard: IEEE 802.3

Battery Management

Output Voltage: 1.8 V

Package

Type: MQFN

Pinout: 56 pins

Process Node and Technology


Features

10BASE-Te: Uses reduced transmission amplitude

100BASE-TX and 1000BASE-T: Low Power Idle (LPI) mode shuts down unused analogue and digital blocks when data traffic is idle to save power. In addition, the Wake-on-LAN (WoL) feature manages and regulates the total system power requirements.The QCA8081 supports IEEE 1588 V2 and Synchronous Ethernet for a complete time synchronisation solution.

Clock synchronisation between slave and master is achieved by exchanging PTP packets. Supports IEEE 1588 V2, providing packet parser, accurate timestamping, and insertion, and supports single-step and two-step clock modes.

Supports Synchronous Ethernet, providing clock output recovered from data received on the line side of the network.The QCA8081 supports MACsec as defined by IEEE 802.1AE, providing hop-by-hop link layer security based on symmetric key AES-GCM encryption and authentication.

Fully in-line processing, no software intervention in the data path

Compliant with IEEE 802.1AE standards

Robust Electrostatic Discharge (ESD) protection, eliminating the need for external protection circuitry

Fully integrated digital adaptive equaliser, echo canceller and near-end crosstalk (NEXT) canceller

Transmit and receive functionality:

Automatic Channel Switching (ACS)

Automatic MDI/MDIX conversion

Automatic polarity correction

Management interface supports 1.8 V input/output voltages

1.05 V and 1.8 V power supplies for reduced operating power consumption

50 MHz crystal/differential clock/single-ended clock

Green ETHOS® power save mode

Power saving mode with media off

Low power mode

Electrostatic discharge

Powerful Electrostatic Discharge (ESD) protection, no external protection circuitry required

Powerful lightning surge protection, no external protection circuitry required

Normal, Boundary, Transparent and Master Clock modes

Multiple loopback modes for diagnostics

Cable Diagnostic Test (CDT)

CRC verifier and packet counter

1.05 V and 1.8 V supplies for reduced power operation


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