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Overview:

The ADRF6821ACPZ from ADI is a highly integrated dual radio frequency (RF) input, zero intermediate frequency (IF)/ low IF RFIC receiver. It has an quadrature demodulator, a digital step attenuator (DSA), an IF linear amplifier, an integrated fractional frequency PLL (PLL) and a low-phase noise multi-core voltage-controlled oscillator (VCO). RFIC is ideal for digital predistortion (DPD) system communication.

The device features a highly isolated 2:1 RF switch and on-chip wideband RF balun that supports two single-ended 50 Ω terminated RF inputs. The programmable attenuator ensures that the high linearity demodulator core has a premium differential RF input level. The integrated attenuator provides a attenuation range of 15 dB with a step size of 1 dB. The high linearity IF amplifier follows the demodulator and provides an interface to the next component in the chain, usually the analog-to-digital converter (ADC).

The ADRF6821 provides two ways to generate a differential local oscillator (LO) input signal: internally via an on-chip fractional frequency synthesizer with a low-phase-noise VCO, or externally via a phase-noise LO signal. The integrated synthesizer has a continuous LO coverage range of 450 MHz to 2800 MHz. The PLL reference input supports a wide frequency range and has an integrated reference divider before the phase frequency detector (PFD).

Block diagram of ADRF6821ACPZ:

Features:

DPD receiver with integrated fractional PLL

RF input frequency range: 450 MHz to 2800 MHz

Internal LO input frequency range: 450 MHz to 2800 MHz

Dual RF input with SPDT absorption RF switch

The integrated RF balun is suitable for single-ended 50Ω inputs

The integrated VCO covers the entire RF input range

Digitally programmable LO phase offset and dc zeroing

Programmable via 4-wire SPI

56 Pin 8 mm x 8 mm LFCSP

Applications:

Cellular W-CDMA/GSM/LTE

DPD receiver

Microwave point-to-point radio