Welcome Here  Shenzhen Mingjiada Electronics Co., Ltd.

SN65LVDS301ZXH - Programmable 27-bit display serial interface transmitter

Overview:

The SN65LVDS301 serializer device converts 27 parallel data inputs into 1, 2, or 3 sub-low-voltage differential signal (SubLVDS) serial outputs. It loads a shift register with 24 pixel bits and 3 control bits from a parallel CMOS input interface. In addition to the 27 data bits, the device also adds a parity check bit and two reserved bits to the 30-bit data word. Each word is latched into the device by a pixel clock (PCLK). The parity bit (odd-check) enables the receiver to detect single-bit errors. The upload rate of the serial shift register is 30, 15, or 10 times the pixel clock data rate, depending on the number of serial links used. A copy of the pixel clock is output via a separate differential output.

Features

FlatLink™3G serial interface technology

Compatible with FlatLink3G receivers (e.g. SN65LVDS302)

• Input supports 24-bit RGB video mode interface

• 24-bit RGB data, 3 control bits, 1 parity bit and 2 reserved bits, transmitted over 1, 2 or 3 differential lines

• SubLVDS differential voltage level

• Effective data throughput up to 1755Mbps

• Three energy-saving working modes

- Active Mode QVGA 17.4mW (typical value)

- Active mode VGA 28.8mW (typical value)

- Off mode 0.5μA (typical value)

- Standby mode 0.5μA (typical value)

• Increased PCB layout flexibility through bus exchange

• 1.8V supply voltage

• ESD rating > 2kV (HBM)

• 4MHz-65MHz pixel clock range

• Fail-safe for all CMOS inputs

• Package: 80 pins, 5mm x 5mm nFBGA®

• Very low EMI compliant with SAE J1752/3 'M' technical specification

Applications

• Wearable devices (non-medical)

• Tablet

• Mobile phone

• Portable electronics

• Games

• Retail automation and payments

• Building Automation