Welcome Here  Shenzhen Mingjiada Electronics Co., Ltd.

AMD is pleased to announce that the first devices in the Spartan™ UltraScale+™ cost-optimised series are now in production! The three smallest devices—SU10P, SU25P, and SU35P—are now available for order and are supported in the AMD Vivado™ Design Suite 2025.1.

This new addition to AMD's cost-optimised product portfolio is specifically designed for cost-sensitive edge applications requiring high I/O, low power consumption, and advanced security features, bringing modern connectivity, post-quantum cryptography, and other advanced capabilities to AMD's proven UltraScale+™ FPGA and adaptive SoC product portfolio.

The first mass production shipments of the three lowest-density devices mark an important milestone in the maturity of small FPGA solutions for the mid-to-low-end market.

AMD Spartan UltraScale+ Series Product Table

Laying a Solid Foundation for Rapid Time-to-Market

Engineers seeking cost-optimised, compact FPGAs also desire simplicity and rapid time-to-market. They require programmable logic, high I/O, robust security, and top-tier reliability. They also need tools that offer one-click timing convergence and rapid debugging capabilities. Most importantly, they need a low-risk path to market. The Spartan UltraScale+ FPGA, built by industry-leading companies using proven UltraScale+ technology, meets these requirements.

For the Spartan UltraScale+ FPGA, AMD leverages its mature UltraScale+ FPGA architecture, which offers an excellent balance of performance and low power consumption, along with a long product lifecycle. In terms of connectivity, the Spartan UltraScale+ FPGA combines high-density input/output (HDIO) for rich 3.3V I/O support, along with new high-speed XP5IO, and offers a higher I/O-to-logic ratio compared to previous generations of AMD cost-optimised FPGAs, all supported by a high-performance and low-power architecture. Designers can also achieve rapid design convergence and easy reuse across projects, as the AMD Vivado Design Suite supports over 160 AMD FPGAs and adaptive SoCs. In some applications, users can achieve one-click timing convergence, enabling rapid design iteration. For machine vision, industrial, and medical applications requiring higher performance, the Spartan UltraScale+ FPGA offers higher speed grades.

New features for cost-sensitive applications

Building on this industry-proven foundation, the Spartan UltraScale+ FPGA also introduces several new advancements for AMD's cost-optimised product portfolio:

Post-quantum cryptography hard IP using NIST-certified algorithms, providing top-tier security. This not only enables secure device configuration but also allows users to access dedicated cryptographic resources, including true random number generators (TRNG), physically unclonable functions (PUF), and secure hashing;

An integrated memory controller for LPDDR4X/5 supports up to 4266 Mb/s on a 32-bit interface, saving up to 15 kLC, enabling designers to transition to smaller devices and further reduce power consumption and cost;

The new XP5IO category supports up to 1.8 Gb/s low-voltage differential signalling (LVDS), 3.2 Gb/s MIPI D-PHY, and other high-speed differential interfaces;

Standard-compliant PCIe® Gen4 hard IP supports endpoint and root port applications;

Supports an 8-wire SPI interface for faster configuration and data transfer rates from external flash memory.