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Shenzhen Mingjiaoda Electronics Co., Ltd. supplies [TI] DRA767PSGACDRQ1 High-performance Multi-Core SoC Processor with ISP for Digital Cockpit Applications Brand New, Original, Quality Assured!

Device Overview

The DRA767PSGACDRQ1 (Jacinto 6 Plus) automotive application processor is designed to meet the strong demand for processing performance in the modern in-vehicle digital cockpit experience.

Jacinto 6 Plus devices enable Original Equipment Manufacturers (OEMs) and Original Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, voice recognition, audio streaming, etc. Jacinto 6 Plus devices achieve very high processing performance through an extremely flexible, fully integrated hybrid processor solution. In addition, they combine programmable video processing with a highly integrated peripheral set.

They are programmable with a dual-core Arm Cortex-A15 RISC CPU with Neon™ extensions, a TI C66x VLIW floating-point DSP core, and Vision AccelerationPac with one or more EVEs. With Arm, developers can reduce system software complexity by separating control functions from other algorithms programmed on the DSP and coprocessors.

In addition, TI offers a full suite of development tools for the Arm, DSP and EVE coprocessors, including a C language compiler and a debugging interface to view source code.

Each device features cryptographic acceleration. All other security features supported on High Security (HS) devices are also available, including secure boot support, debug security, and trusted execution environment support.

The DRA77xP and DRA76xP Jacinto 6 Plus processor family devices are AEC-Q100 compliant.

Features

- Architecture designed for infotainment applications

- Supports video, image and graphics processing

- Full HD video (1920 x 1080p, 60fps)

- Multiple video inputs and video outputs

- 2D and 3D graphics

- Dual Arm® Cortex® -A15 microprocessor subsystem

-A15 microprocessor subsystem

- Up to two C66x floating-point VLIW DSPs

- Full object code compatibility with C67x and C64x+

- Up to 32 16 x 16-bit fixed-point multiplications per cycle

- Up to 2.5MB of on-chip L3 RAM

- Level 3 (L3) and Level 4 (L4) interconnects

- Dual DDR2/DDR3/DDR3L memory interface (EMIF) modules

- Supports up to DDR2-800 and DDR3-1333

- Supports up to 2GB per EMIF

- ARM® Cortex®-M4 Dual-Core Image Processing Unit (IPU)

- Up to 2 Embedded Vision Engines (EVE)

- Imaging Subsystem (ISS)

- Image Signal Processor (ISP)

- Wide Dynamic Range and Lens Distortion Correction (WDR and Grid LDC)

- One camera adaptation layer (CAL_B)

Applications

- Human Machine Interface (HMI)

- Navigation

- Digital and analogue radio

- Rear Seat Entertainment System

- Multimedia playback

- Web browsing capabilities

- ADAS Integration

- Integrated Automotive Digital Cockpit

- Infotainment/Centre Control Panel

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