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Intel ® Cyclone ® V SE SoC FPGA 5C SEBA6U23I7NTS Dual-Core arm ® Cortex ® -A9 672UBGA

Intel ® Cyclone ® V SE SoC FPGA 5C SEBA6U23I7NTS Dual-Core arm ® Cortex ® -A9 672UBGA

Source:our siteTime:2025-01-07Views:

About:5CSEBA6U23I7NTS is a Cyclone VSE SoC FPGA device integrated with ARM Cortex-A9 MPCore processor system. The series is optimized for low system cost and power consumption for 614 Mbps to 3.125 Gbps transceiver applications.Product advantages:1, B…

About:

5CSEBA6U23I7NTS is a Cyclone® VSE SoC FPGA device integrated with ARM® Cortex®-A9 MPCore processor system. The series is optimized for low system cost and power consumption for 614 Mbps to 3.125 Gbps transceiver applications.

5CSEBA6U23I7NTS.jpg

Product advantages:

1, Based on TSMC 28nm low power (28LP) process technology, including rich core intellectual property (IP) modules, enabling you to achieve differentiation and more features.

2, it provides an 8-input adaptive logic module (ALM) and precision adjustable digital signal processing (DSP) module that can support up to 13.59 megabits (Mb) of embedded memory.

3. Tightly integrated dual-core ARM® Cortex-A9 MPCore processor, hardcore IP and FPGA in a single Cyclone® system-on-chip (SoC). It supports more than 128 Gbps of peak bandwidth and integrates data consistency between processor and FPGA architectures.


Applications:

Energy efficiency of next generation drives

IP CCTV surveillance

High definition (HD) IP camera


Main functions:

Embedded memory block

M10K: 10 kilobits (Kb) of memory block with soft error correction code (ECC).

Memory Logical Array Block (MLAB) : 640-bit distributed LUTRAM, up to 25% of ALM can be used as MLAB memory.

Universal I/O

Low Voltage Differential Signal (LVDS) receiver of 875 megabits per second (Mbps) and LVDS transmitter of 840 Mbps.

400 MHz/800 Mbps external memory interface.

Terminal on chip (OCT).

Support 3.3V voltage, drive strength up to 16 mA.

External memory interface

On Cyclone® V SoC devices, additional hardcore memory controllers in the HPS support DDR3, DDR2 and LPDDR2 SDRAM devices.

Hard Processor System (HPS)

The HPS consists of a dual-core Arm* Cortex* -A9 MPCore* processor, a rich set of peripherals, and a shared multi-port SDRAM memory controller.


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