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TSMC's 3nm process yields between 60% and 80%

TSMC's 3nm process yields between 60% and 80%

Source:our siteTime:2023-01-02Views:

On January 2, TSMC held a 3nm mass production and expansion ceremony at the Tainan Science Park on December 29, officially announcing the launch of 3nm mass production. Samsung started its N3 (3nm) process chip manufacturing a few months ago, but TSMC…

On January 2, TSMC held a 3nm mass production and expansion ceremony at the Tainan Science Park on December 29, officially announcing the launch of 3nm mass production. Samsung started its N3 (3nm) process chip manufacturing a few months ago, but TSMC's yields are significantly better.

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According to Business Next, analysts and experts specialising in semiconductors estimate that TSMC's current N3 yields could be as low as 60 to 70 percent or as high as 75 to 80 percent, which is already quite good for the first products. Meanwhile, financial analyst Dan Nystedt tweeted that TSMC's current N3 yields are similar to N5 yields at the beginning of the ramp, which could be as high as 80 percent.


In contrast, Samsung foundries are seeing yields ranging from 10 to 20 percent in the early stages of the 3GAE process, with no improvement.


Due to TSMC's limited number of N3 designs currently in commercial production (presumably barely more than three ICs) and the fact that yield-related data is a trade secret for the foundry and its customers, it is not yet possible to make a specific judgement as to how high or low TSMC's N3 yields are.


Furthermore, given the rumours surrounding the initial N3 node (aka N3B), Apple may be the only company to adopt this technology, with other developers expected to use the somewhat more stable N3E improvement process.


According to the information, TSMC will use the capacity-limited N3 node process before moving to a more stable and efficient full production N3E later in 2023, followed by N3P in 2024, the year TSMC will also put its 2nm GAA process into pilot production at its Hsinchu plant and mass production in 2025.


TSMC's website shows that its 3nm process is the next full generation process after 5nm, with the best PPA and transistor technology. Compared to the 5nm process, the 3nm process will offer approximately 70% higher logic density, 10-15% faster at the same power consumption, or 25-30% lower power consumption at the same speed.

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