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TI DSP Product:TMS320DM642AGDK7 Video/Imaging Fixed-Point Digital Signal Processor

Product Description of TMS320DM642AGDK7

TMS320DM642AGDK7 is high-performance Video/Imaging Fixed-Point Digital Signal Processor.

The TMS320DM642AGDK7 uses a two-level cache-based architecture and has a powerful and diverse set of peripherals. The Level 1 program cache (L1P) is a 128-Kbit direct mapped cache and the Level 1 data cache (L1D) is a 128-Kbit 2-way set-associative cache. The Level 2 memory/cache (L2) consists of an 2-Mbit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. The peripheral set includes: three configurable video ports; a 10/100 Mb/s Ethernet MAC (EMAC); a management data input/output (MDIO) module; a VCXO interpolated control port (VIC); one multichannel buffered audio serial port (McASP0); an inter-integrated circuit (I2C) Bus module; two multichannel buffered serial ports (McBSPs); three 32-bit general-purpose timers; a user-configurable 16-bit or 32-bit host-port interface (HPI16/HPI32); a peripheral component interconnect (PCI); a 16-pin general-purpose input/output port (GP0) with programmable interrupt/event generation modes; and a 64-bit glueless external memory interface (EMIFA), which is capable of interfacing to synchronous and asynchronous memories and peripherals.

Product Attributes of TMS320DM642AGDK7

Type：Fixed Point

Interface：Host Interface, I2C, McASP, McBSP, PCI

Clock Rate：720MHz

Non-Volatile Memory：External

On-Chip RAM：160kB

Voltage - I/O：3.30V

Voltage - Core：1.40V

Operating Temperature：0°C ~ 90°C (TC)

Number of Cores: 1 Core 

Program Memory Size: 16 kB 

Data RAM Size: 256 kB 

L1 Cache Instruction Memory: 16 kB 

L1 Cache Data Memory: 16 kB 

Data Bus Width: 32 bit 

Moisture Sensitive: Yes 

Number of I/Os: 16 I/O 

Number of Timers/Counters: 3 x 32 bit

Unit Weight: 2.446 g