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Intel 5CSXFC5C6U23C6N Cyclone V SX Field Programmable Gate Array ICProduct DescriptionCyclone V SX FPGA is optimized for low system cost and power with integrated ARM Cortex-A9 MPCore Processor System for general logic and DSP applications.Key Feature…
Intel 5CSXFC5C6U23C6N Cyclone V SX Field Programmable Gate Array IC
Product Description
Cyclone® V SX FPGA is optimized for low system cost and power with integrated ARM® Cortex®-A9 MPCore Processor System for general logic and DSP applications.
Key Feature
Embedded Memory Blocks
10-kilobits (Kb) memory blocks with soft error correction code (ECC).
Memory logic array block (MLAB): 640-bit distributed LUTRAM where you can use up to 25% of the ALMs as MLAB memory.
General-purpose I/Os
875 megabits per second (Mbps) low-voltage differential signaling (LVDS) receiver and 840 Mbps LVDS transmitter.
400 MHz/800 Mbps external memory interface.
On-chip termination
3.3 V support with up to 16 mA drive strength.
External Memory Interface
In the Cyclone® V SoC devices, an additional hard memory controller in the HPS supports DDR3, DDR2, and LPDDR2 SDRAM devices.
Hard Processor System
The HPS consists of a dual-core Arm* Cortex* -A9 MPCore* processor, a rich set of peripherals, and a shared multiport SDRAM memory controller.
Benefits
Do More with Less Power, Design Time, and Cost
Logic Integration and Differentiation Capabilities
Hard processor system (HPS) with integrated ARM® Cortex®-A9 MPCore processor
Applications
Wireless Backhaul
Autonomous Driving and InVehicle Experience (IVE)
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Time:2024-11-18
Time:2024-11-18
Time:2024-11-18
Time:2024-11-18
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