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TI CDCE813R02TPWRQ1: Programmable 1-PLL clock synthesizer and jitter eliminator

TI CDCE813R02TPWRQ1: Programmable 1-PLL clock synthesizer and jitter eliminator

Source:our siteTime:2024-05-10Views:

Product Introduction:CDCE813R02TPWRQ1 clock synthesizer and jitter eliminator is a modular, low-cost, high-performance programmable clock synthesizer based on phase locked loop (PLL). The device can generate up to three output clocks from one input fr…

Product Introduction:

CDCE813R02TPWRQ1 clock synthesizer and jitter eliminator is a modular, low-cost, high-performance programmable clock synthesizer based on phase locked loop (PLL). The device can generate up to three output clocks from one input frequency. Each output can be programmed in the system for any clock frequency up to 230MHz using an integrated configurable PLL. The CDCE813-Q1 has a separate output power pin and VDDOUT, offering 2.5V to 3.3V. The input receives an external crystal or LVCMOS clock signal. An optional on-chip VCXO synchronizes the output frequency with an external control signal. PLL supports SSC (Spread Spectrum Clock) for better electromagnetic interference (EMI) performance.


Features

Meets automotive application standards

Has the following features in accordance with AEC-Q100 standard:

Device Temperature Class 2: Ambient operating temperature range from -40°C to 105°C

Device Human Body Model (HBM) Electrostatic Discharge (ESD) Class H2

Device Charging Device Model (CDM) ESD classification class C6

In-system programmability and EEPROM

Serial programmable volatile register

Non-volatile EEPROM stores customer Settings

Flexible input timing concepts

External crystals: 8MHz to 32MHz

Single-ended LVCMOS, up to 160MHz

Freely optional output frequency, up to 230MHz

Low noise PLL core

Integrated PLL loop rule module

Low cycle jitter (typical value 50ps)

Device Power supply: 1.8V (core voltage)

CDCE813-Q1:3.3V and 2.5V

Flexible clock driver

Three user definable control inputs [S0/S1/S2], such as SSC selection, frequency switching, output start and power off

Generates high-precision clocks for video, audio, USB, IEEE1394, RFID, Bluetooth®, WLAN, Ethernet, and GPS

Generate common clock frequencies for TI-DaVinci™, OMAP™, DSP

Programmable SSC modulation

0-PPM clock can be generated

Encapsulated in TSSOP

Development and programming kit for PLL design and programming (TI Pro-Clock™)


Applications

• Cluster

• Audio host

• Navigation system

• Advanced Driver Assistance Systems (ADAS)


CDCE813-Q1 Schematic diagram:

原理图.png

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