sales@hkmjd.com
Service Telephone:86-755-83294757
Trade Name:LCMXO2-2000HE-5TG100C
Data Manual:LCMXO2-2000HE-5TG100C.pdf
Brand:Lattice
Particular Year:23+
Package:100-LQFP
Delivery Date:New original
Stock: 2000pcs
The MachXO2 devices are designed on a 65 nm non-volatile low power process. LCMXO2-2000HE-5TG100C device architecture has several features such as programmable low swing differential I/Os and the ability to turn off I/O banks,on-chip PLLs and oscillators dynamically. These features help manage static and dynamic power consumption resulting in low static power for all members of the family.
Features
Flexible Logic Architecture
Six devices with 256 to 6864 LUT4s and 18 to 334 I/Os
Ultra Low Power Devices
Advanced 65 nm low power process
As low as 22 µW standby power
Programmable low swing differential I/Os
Stand-by mode and other power saving options
Embedded and Distributed Memory
Up to 240 kbits sysMEM™ Embedded Block RAM
Up to 54 kbits Distributed RAM
Dedicated FIFO control logic
On-Chip User Flash Memory
Up to 256 kbits of User Flash Memory
100,000 write cycles
Accessible through WISHBONE, SPI, I2C and JTAG interfaces
Can be used as soft processor PROM or as Flash memory
Pre-Engineered Source Synchronous I/O
DDR registers in I/O cells
Dedicated gearing logic
7:1 Gearing for Display I/Os
Generic DDR, DDRX2, DDRX4
Dedicated DDR/DDR2/LPDDR memory with DQS support
High Performance, Flexible I/O Buffer
I/Os support hot socketing
On-chip differential termination
Programmable pull-up or pull-down mode
Model
Brand
Package
Quantity
Describe
Xilinx
196-CSPBGA
1000
Spartan®-7 Field Programmable Gate Array (FPGA) IC,196-TFBGA, CSBGA
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